DocumentCode :
3070305
Title :
An Investigation of Fault Tolerance Behavior of 32-Bit DLX Processor
Author :
Yaghini, Pooria M. ; Zarandi, Hamid R. ; Eghbal, Ashkan ; Jafarzadeh, Akbar ; Eskandari, Saeedeh
Author_Institution :
Dept. of Comput. Eng. & Inf. Technol., Amirkabir Univ. of Technol., Tehran, Iran
fYear :
2009
fDate :
18-23 June 2009
Firstpage :
93
Lastpage :
98
Abstract :
This paper presents a study of fault tolerance behavior of a 32-bit DLX processor. Simulation-based method has been applied to analyze the fault tolerance characteristic of this processor. This experiment is based on injection of 14000 faults among 70 points of components which are more frequently used in VHDL model. The experimental results have been considered in different aspects. Up to 55% of the injected faults cause system failure and also approximately 42% of them are masked before changing into errors. Less than 3% of injected faults remain as latent errors. The Average of fault latency has also been reported between 47 to 59 clock cycles regarding to different workloads. The comparison of observed component distinguishes ALU as the most sensitive one among others with the approximate failure rate of 50%.
Keywords :
fault tolerant computing; hardware description languages; microprocessor chips; 32-bit DLX processor; VHDL components; fault latency; fault tolerance behavior; simulation-based method; Analytical models; Computational modeling; Delay; Fault tolerance; Fault tolerant systems; Hardware; Information technology; Laboratories; Microprocessors; Robustness; DLX processor; Fault tolerance; fault injection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Dependability, 2009. DEPEND '09. Second International Conference on
Conference_Location :
Athens, Glyfada
Print_ISBN :
978-0-7695-3666-8
Type :
conf
DOI :
10.1109/DEPEND.2009.20
Filename :
5211080
Link To Document :
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