• DocumentCode
    3070577
  • Title

    A high speed two-dimensional FFT processor

  • Author

    Chowdary, N.U. ; Steenaart, W.

  • Author_Institution
    University of Ottawa, Ontario, Canada
  • Volume
    9
  • fYear
    1984
  • fDate
    30742
  • Firstpage
    177
  • Lastpage
    180
  • Abstract
    In this paper, a method of realizing a real time high speed two-dimensional (2-d) FFT processor is proposed. A fully implemented lower order FFT processor block is timeshared to do row/column transforms of a two-dimensional array of complex samples. An efficient method of matrix transposition is also considered. The design details of the processor with commercially available CMOS digital ICs are given. Hardware complexity/power versus speed comparison and computer simulation results are also included.
  • Keywords
    Application software; Buffer storage; CMOS integrated circuits; CMOS process; CMOS technology; Computer simulation; Hardware; Image processing; Latches; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '84.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1984.1172378
  • Filename
    1172378
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3070577