Title :
Growth and fabrication of InGaAs/InAlAs HEMTs on bonded-and-etch-back InP-on-Si
Author :
Fathimulla, A. ; Abrahams, J. ; Hier, H. ; Loughran, T.
Author_Institution :
Allied-Signal Aerosp. Co., Columbia, MD, USA
Abstract :
InGaAs/InAlAs HEMTs fabricated on bonded-and-etched-back InP-on-Si substrates are reported. The process involves depositing SiO/sub 2/ on both the Si and InP substrates. The wafers are then contacted and bonded in a furnace at low temperature. Defects in the bond can be minimized by bonding in a particle-free environment. After bonding to a Si substrate, the InP wafer is thinned to <10 mu m and a strain-relief grid is etched through the InP to the SiO/sub 2/ layer. For fabrication of the HEMT, a standard processing sequence of mesa isolation, ohmic-contacts formation, gate-metal deposition and overlay was used. A maximum transconductance of 180 mS/mm was measured for a 1.2- mu m-gate-length device.<>
Keywords :
III-V semiconductors; aluminium compounds; gallium arsenide; high electron mobility transistors; indium compounds; molecular beam epitaxial growth; semiconductor growth; 1.2 micron; 180 mS; HEMTs; InGaAs-InAlAs-InP-Si; InP; InP-Si substrates; MBE; Si; SiO/sub 2/ layer; bonded and etched back substrates; furnace bonding; gate length; gate-metal deposition; maximum transconductance; mesa isolation; ohmic-contacts formation; overlay; strain-relief grid; transistor growth; Etching; Fabrication; Furnaces; HEMTs; Indium compounds; Indium gallium arsenide; Indium phosphide; MODFETs; Temperature; Wafer bonding;
Conference_Titel :
Indium Phosphide and Related Materials, 1990. Second International Conference.
Conference_Location :
Denver, CO, USA
DOI :
10.1109/ICIPRM.1990.202986
