• DocumentCode
    3072323
  • Title

    Deterministic Finite Automata for pattern matching in FPGA for intrusion detection

  • Author

    Karuppiah, A. Babu ; Rajaram, S.

  • Author_Institution
    Velammal Coll. of Eng. & Technol., Madurai, India
  • fYear
    2011
  • fDate
    18-19 March 2011
  • Firstpage
    167
  • Lastpage
    170
  • Abstract
    Intrusion detection has been at the center of intense research in the last decade owing to the rapid increase of sophisticated attacks on computer systems. Network Intrusion Detection Systems (NIDS) detect and prevent numerous security threats in network traffic. Recent Network Intrusion Detection Systems (NIDS) use regular expressions to represent suspicious or malicious character sequences in packet payloads in a more efficient way. They require high-speed packet processing providing a challenging case study for pattern matching using regular expressions. This paper presents an efficient method for finding matches to a given regular expression in a given text using FPGAs. This paper introduces a Deterministic Finite Automata (DFA) method of hardware implementation to support regular expressions.
  • Keywords
    deterministic automata; field programmable gate arrays; finite automata; security of data; telecommunication traffic; FPGA; deterministic finite automata; network intrusion detection system; network traffic; packet processing; pattern matching; security threat; Automata; Computers; Doped fiber amplifiers; Field programmable gate arrays; Hardware; Intrusion detection; Pattern matching; Network Intrusion Detection System; Nondeterministic Finite Automata; Regular Expression;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer, Communication and Electrical Technology (ICCCET), 2011 International Conference on
  • Conference_Location
    Tamilnadu
  • Print_ISBN
    978-1-4244-9393-7
  • Type

    conf

  • DOI
    10.1109/ICCCET.2011.5762461
  • Filename
    5762461