• DocumentCode
    3072619
  • Title

    Device level analysis of threshold voltage variation in FinFET with varied design parameters

  • Author

    Moni, D. Jackuline ; Malarkodi, R. ; Suresh, B.

  • Author_Institution
    Karunya Univ., Coimbatore, India
  • fYear
    2011
  • fDate
    18-19 March 2011
  • Firstpage
    247
  • Lastpage
    252
  • Abstract
    This paper describes the device characteristics verification and biasing analysis of Silicon on Insulator (SOI) devices with single gate and double gate. Improvement in threshold voltage controllability and variability has been observed for these devices. One of the leading double gate devices, FinFET is analyzed over different parameter variations and with back biasing techniques. Thanks to wide threshold voltage controllability of the FinFET device in comparison with all other devices. Some of the peculiar characteristics exhibited by the device for the fin width variation when controlled in single gate (SG) and independent gate (IG) modes have been proposed here for the first time.
  • Keywords
    MOSFET; silicon-on-insulator; FinFET; back biasing; design parameters; device level analysis; independent gate modes; silicon on insulator; threshold voltage controllability; FinFETs; Logic gates; Resistance; Threshold voltage; Transconductance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer, Communication and Electrical Technology (ICCCET), 2011 International Conference on
  • Conference_Location
    Tamilnadu
  • Print_ISBN
    978-1-4244-9393-7
  • Type

    conf

  • DOI
    10.1109/ICCCET.2011.5762478
  • Filename
    5762478