Beyond superscalar RISC, what next? An almost unbiased view

In the coming decade, unceasing demand for more processing power should drive microprocessor performance growth rates to nearly those of the past decade. Operating frequencies of 4 GHz and then approaching 10 GHz may be reached in 15 years as process geometries shrink well below 0.15 /spl mu/m. New microprocessor performance strategies will be required to fill the gap as gate performance fails to scale, wire delays begin to dominate cycle times, and superscalar parallelism approaches its limit. A new set of design dynamics for microprocessors and instruction set architectures (ISAs) will come about as physical, logical, and practical limits are encountered while new machine-independent languages, including Java, reduce or eliminate many conventional constraints on ISAs and their associated microarchitectures. Some of the sometimes conflicting trends emerging are discussed.