DocumentCode
3073302
Title
Design and test of planar transformer using CMOS technology with BALUN applications
Author
Chien-Chang Huang ; Wei-Di Tu ; Chia-Kai Chen
Author_Institution
Dept. of Commun. Eng., Yuan Ze Univ., Chungli, Taiwan
fYear
2012
fDate
24-26 Oct. 2012
Firstpage
220
Lastpage
223
Abstract
This paper presents design and test of a planar transformer using 0.18 μm CMOS technology with BALUN applications. To enhance the transformer coupling coefficient of the primary/secondary coil, the broadside-coupled structure is adapted while the circuit size is also minimized in chip area of 190 μm × 190 μm. The measured results based on the differential-/common-mode thru-reflect-line (TRL) calibration are shown and the associated transformer parameters including inductances and coupling coefficient are extracted. The additional BALUN application is performed as well in the frequency range of 1.6 GHz - 12 GHz.
Keywords
CMOS integrated circuits; UHF integrated circuits; baluns; calibration; field effect MMIC; transformer testing; CMOS technology; TRL calibration; associated transformer parameters; balun applications; broadside-coupled structure; differential-common-mode thru-reflect-line calibration; frequency 1.6 GHz to 12 GHz; planar transformer testing; primary-secondary coil; size 0.18 mum; transformer coupling coefficient; CMOS integrated circuits; Calibration; Coils; Couplings; Impedance matching; Ports (Computers); Scattering parameters;
fLanguage
English
Publisher
ieee
Conference_Titel
Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2012 7th International
Conference_Location
Taipei
ISSN
2150-5934
Print_ISBN
978-1-4673-1635-4
Electronic_ISBN
2150-5934
Type
conf
DOI
10.1109/IMPACT.2012.6420246
Filename
6420246
Link To Document