Analysis of carrier mobility change in silicon inversion layer due to through-silicon via thermal stress

Author

Hsieh, Chih-Cheng ; Chiu, Troy-Chi

Author_Institution

Dept. of Mech. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan

fYear

2012

fDate

24-26 Oct. 2012

Firstpage

351

Lastpage

354

Abstract

The effect of stress concentration around Cu through-silicon via (TSV) on carrier mobility in typical metal oxide semiconductor field effect transistor (MOSFET) Si inversion layer is considered by using numerical finite element simulation in combination with piezoresistive equations. Carrier mobility changes along <;100>; or <;110>; channel directions are obtained for transistors on (001) Si die, and for devices fabricated with either strain-Si or unstrained-Si technology. The analysis shows that the TSV related thermal stress causes a higher mobility shift in p-MOSFET with <;110>; channels.

Keywords

MOSFET; elemental semiconductors; finite element analysis; silicon; thermal stresses; three-dimensional integrated circuits; MOSFET silicon inversion layer; Si; TSV related thermal stress; carrier mobility change analysis; metal oxide semiconductor field effect transistor silicon inversion layer; numerical finite element simulation; p-MOSFET; piezoresistive equations; through-silicon via thermal stress; Finite element methods; MOSFET circuits; Piezoresistance; Silicon; Stress; Thermal stresses; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), 2012 7th International

Conference_Location

Taipei

ISSN

2150-5934

Print_ISBN

978-1-4673-1635-4

Electronic_ISBN

2150-5934

Type

conf

DOI

10.1109/IMPACT.2012.6420258

Filename

6420258