DocumentCode
3074546
Title
Systolic array technique applied to symmetric FIR filters
Author
Mercy, Brian R.
Author_Institution
International Business Machines Corporation, Manassas, Virginia
Volume
9
fYear
1984
fDate
30742
Firstpage
762
Lastpage
765
Abstract
A VLSI chip has been designed that takes advantage of the symmetry that is present in many finite impulse response filters. A group of these chips may be joined together in a systolic arrangement. The result is a very powerful filter processing system.
Keywords
Array signal processing; Costs; Finite impulse response filter; Joining processes; MOS devices; Pipelines; Power dissipation; Signal processing algorithms; Systolic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '84.
Type
conf
DOI
10.1109/ICASSP.1984.1172595
Filename
1172595
Link To Document