DocumentCode :
3075014
Title :
Mechanistic-empirical processor performance modeling for constructing CPI stacks on real hardware
Author :
Eyerman, Stijn ; Hoste, Kenneth ; Eeckhout, Lieven
Author_Institution :
ELIS Dept., Ghent Univ., Ghent, Belgium
fYear :
2011
fDate :
10-12 April 2011
Firstpage :
216
Lastpage :
226
Abstract :
Analytical processor performance modeling has received increased interest over the past few years. There are basically two approaches to constructing an analytical model: mechanistic modeling and empirical modeling. Mechanistic modeling builds up an analytical model starting from a basic understanding of the underlying system - white-box approach - whereas empirical modeling constructs an analytical model through statistical inference and machine learning from training data, e.g., regression modeling or neural networks - black-box approach. While an empirical model is typically easier to construct, it provides less insight than a mechanistic model. This paper bridges the gap between mechanistic and empirical modeling through hybrid mechanistic-empirical modeling (gray-box modeling). Starting from a generic, parameterized performance model that is inspired by mechanistic modeling, regression modeling infers the unknown parameters, alike empirical modeling. Mechanistic-empirical models combine the best of both worlds: they provide insight (like mechanistic models) while being easy to construct (like empirical models). We build mechanistic-empirical performance models for three commercial processor cores, the Intel Pentium 4, Core 2 and Core il, using SPEC CPU2000 and CPU2006, and report average prediction errors between 9% and 13%. In addition, we demonstrate that the mechanistic-empirical model is more robust and less subject to overfitting than purely empirical models. A key feature of the proposed mechanistic-empirical model is that it enables constructing CPI stacks on real hardware, which provide insight in commercial processor performance and which offer opportunities for software and hardware optimization and analysis.
Keywords :
inference mechanisms; learning (artificial intelligence); microprocessor chips; multiprocessing systems; performance evaluation; regression analysis; CPI stacks; Intel Pentium 4; Intel Pentium Core 2; Intel Pentium Core i7; SPEC CPU2000; SPEC CPU2006; analytical model; commercial processor core; gray-box modeling; hardware optimization; machine learning; mechanistic-empirical processor performance modeling; prediction errors; regression modeling; software optimization; statistical inference; training data; Analytical models; Computational modeling; Hardware; Load modeling; Mathematical model; Memory management; Pipelines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Performance Analysis of Systems and Software (ISPASS), 2011 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-61284-367-4
Electronic_ISBN :
978-1-61284-368-1
Type :
conf
DOI :
10.1109/ISPASS.2011.5762738
Filename :
5762738
Link To Document :
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