Design of a tailor-made memory protection unit for low power microcontrollers

Low power microcontrollers are becoming more and more considered for a wide variety of application scenarios. In modern industrial automation, medical systems, critical infrastructure or smart grid systems embedded devices with low power microcontrollers are ubiquitous. But, by the proceeding trend to link these devices form the real world to the cyber world positive effects such as reduced costs are unfortunately tightly coupled with serious security problems. Especially micro-controllers without any memory protections means make these kind of devices vulnerable for malicious attacks. Recent news have shown that the above mentioned systems are already identified as possible targets. In this paper we present a tailor-made Memory Protection Unit (MPU) that provides an effective and efficient isolation of memory sections taking the characteristic of sensor node applications into account. We describe the design of our MPU and its integration in a low power microcontroller. Furthermore, we give a runtime and an area estimation. Our simulation results show that the performance penalty of our approach is in the range of four clock cycles for two operand operations that can be considered to be the most complex ones. In addition the estimated area penalty is less than 7 per cent of the area of our microcontroller.