Title :
4 GHz and 13 GHz tuned amplifiers implemented in a 0.1 /spl mu/m CMOS technology on SOI and SOS substrates
Author :
Kim, Kwan-Ho ; Ho, Yu-Chen ; Floyd, Brian ; Wann, C. ; Taur, Yuan ; Lagnado, I.
Author_Institution :
Florida Univ., Gainesville, FL, USA
Abstract :
CMOS is a viable contender for front-end receiver circuits in the frequency range between 0.9 and 2 GHz. As gate lengths decrease to 0.1 /spl mu/m and below, this frequency range will increase, potentially opening up applications such as wireless LANs in the 5-20 GHz range. These 4 GHz and 13 GHz CMOS tuned amplifiers are implemented with partially-depleted silicon on insulator (SOI) and silicon on sapphire (SOS) nMOS transistors with floating bodies. Measured forward gains (S21) for the 4 GHz SOS and SOI amplifiers are 12 and 11 dB, respectively, and 15 and 5.3 dB for the 13 GHz SOS and SOI amplifiers. The 13 GHz amplifiers are the first in a CMOS technology to have tuned frequencies greater than 10 GHz. The CMOS process uses 0.35 /spl mu/m design rules for all dimensions except for the 0.1 /spl mu/m gate length and 2.9 nm gate oxide thickness. The nMOS transistors have -100 GHz measured peak f/sub T/. Threshold voltages are 0.2 and 0.4 V for the SOS and SOI transistors, respectively.
Keywords :
circuit tuning; 0.1 micron; 0.2 V; 0.4 V; 11 dB; 12 dB; 13 GHz; 15 dB; 4 GHz; 5.3 dB; CMOS technology; SOI substrates; SOS substrates; Si; design rules; floating bodies; forward gains; front-end receiver circuits; partially-depleted transistors; threshold voltages; tuned amplifiers; wireless LANs; CMOS process; CMOS technology; Frequency; MOSFET circuits; Noise figure; Operational amplifiers; Semiconductor device modeling; Transducers; Tuned circuits;
Conference_Titel :
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-4344-1
DOI :
10.1109/ISSCC.1998.672405