• DocumentCode
    3076690
  • Title

    Deployment and Scheduling Synthesis for Mixed-Critical Shared-Memory Applications

  • Author

    Voss, Stephan ; Schatz, Berhard

  • Author_Institution
    fortiss GmbH, Munich, Germany
  • fYear
    2013
  • fDate
    22-24 April 2013
  • Firstpage
    100
  • Lastpage
    109
  • Abstract
    This paper presents an efficient approach for generating suitable system architectures for embedded systems efficiently. Thereby, we focus on a joint generation of schedules and deployment for mixed-criticality multicore architectures using shared memory. The presented approach computes task and message schedules that are optimized with respect to a global discrete time base. As part of the solution, our approach generates an optimized assignment of tasks to computation resources (cores) concerning local memory constraints of cores and criticality constraints of tasks.This approach is integrated into the Auto FOCUS3 tool-chain, using a formally defined model of computation with explicit data-flow and discrete-time semantics to develop multi-criticality embedded systems. Our approach relies on a symbolic encoding scheme, based on a system model that is derived from the system architecture. This paper provides a formalization describing the scheduling problem as a satisfiability problem using boolean formulas and linear arithmetic constraints. A state-of-the-art satisfiability modulo theory (SMT) solver is used to compute the joint schedule and deployment for such architectures. This paper demonstrates that state-of-the art satisfiability modulo theory solvers can be used to efficiently compute (safety-oriented) deployments including real-time task and communication schedules for mixed-criticality applications.
  • Keywords
    Boolean functions; computability; embedded systems; processor scheduling; programming language semantics; shared memory systems; Auto FOCUS3 tool-chain; Boolean formulas; SMT; computation resources; deployment synthesis; discrete-time semantics; explicit data-flow semantics; global discrete time; linear arithmetic constraints; local memory constraints; message schedules; mixed-critical shared-memory applications; mixed-criticality multicore architectures; multicriticality embedded systems; satisfiability modulo theory solver; satisfiability problem; scheduling synthesis; system architecture; system architectures generation; task assignment optimization; task criticality constraints; task schedules; Computational modeling; Multicore processing; Processor scheduling; Resource management; Schedules; Scheduling; Deployment Synthesis; Mapping; SMT; Scheduling; Shared-Memory Applications;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Engineering of Computer Based Systems (ECBS), 2013 20th IEEE International Conference and Workshops on the
  • Conference_Location
    Scottsdale, AZ
  • Print_ISBN
    978-0-7695-4991-0
  • Type

    conf

  • DOI
    10.1109/ECBS.2013.23
  • Filename
    6601578