DocumentCode
3076708
Title
A continuously-calibrated 10 M sample/s 12 b 3.3 V ADC
Author
Ingino, J., Jr. ; Wooley, B.
Author_Institution
Stanford Univ., CA, USA
fYear
1998
fDate
5-7 Feb. 1998
Firstpage
144
Lastpage
145
Abstract
Continuous calibration allows a converter to function continuously in the presence of environmental fluctuations and supply variations by periodically correcting for errors without interrupting the ADC output. This paper introduces a technique for continuously calibrating a pipelined A/D converter. Calibration is performed in the analog domain so as to avoid high-linearity calibration hardware or complex signal processing. A 10 MS ample/s, 12b converter implemented in a conventional 0.5 /spl mu/m, single-poly, four-metal, CMOS technology operates from a 3.3V supply. This experimental circuit digitizes a 4.8 MHz signal with a peak SNDR of 67 dB.
Keywords
analogue-digital conversion; 0.5 micron; 12 bit; 3.3 V; 4.8 MHz; ADC; continuous calibration; environmental fluctuations; error correction; four-metal CMOS technology; peak SNDR; pipelined A/D converter; supply variations; CMOS technology; Calibration; Capacitors; Dynamic range; Hardware; Linearity; Logic design; Pipelines; Threshold voltage; Wireless sensor networks;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-4344-1
Type
conf
DOI
10.1109/ISSCC.1998.672409
Filename
672409
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