DocumentCode :
3078713
Title :
Reconfigurable processor for public-key cryptography
Author :
Symth, N. ; McLoone, Máire ; McCanny, John V.
Author_Institution :
Inst. of Electron., Commun. & Inf. Technol., Queen´´s Univ. of Belfast, UK
fYear :
2005
fDate :
2-4 Nov. 2005
Firstpage :
110
Lastpage :
115
Abstract :
This paper proposes a novel processor architecture that provides a reconfigurable computing platform for modular exponentiation used in RSA and Diffle-Hellman public-key cryptography. The processor can operate autonomously to perform all operations required for modular exponentiation. A parallel-processing pipeline offers the versatility to perform any large-integer arithmetic. The processor can perform modular exponentiation using classical exponentiation, Montgomery multiplication and Barrett reduction. Hardware exponent receding is used to improve the efficiency of square-and-multiply algorithms by 15%. The performance of the processor is competitive in comparison to fixed functionality hardware implementations and is significantly faster than general purpose public-key cryptographic processors previously reported in the literature.
Keywords :
cryptography; microprocessor chips; parallel processing; pipeline arithmetic; reconfigurable architectures; Barrett reduction; Diffle-Hellman cryptography; Montgomery multiplication; classical exponentiation; hardware exponent receding; large-integer arithmetic; modular exponentiation; parallel-processing pipeline; public-key cryptography; reconfigurable computing platform; reconfigurable processor; square-and-multiply algorithms; Acceleration; Arithmetic; Coprocessors; Delay; Hardware; Microprocessors; Pipelines; Protection; Public key; Public key cryptography;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems Design and Implementation, 2005. IEEE Workshop on
ISSN :
1520-6130
Print_ISBN :
0-7803-9333-3
Type :
conf
DOI :
10.1109/SIPS.2005.1579848
Filename :
1579848
Link To Document :
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