DocumentCode
3078847
Title
Mapping concurrent applications on network-on-chip platforms
Author
Bartic, T.A. ; Desmet, D. ; Mignolet, J.-Y. ; Miller, J. ; Robert, F.
Author_Institution
IMEC, Leuven, Belgium
fYear
2005
fDate
2-4 Nov. 2005
Firstpage
154
Lastpage
159
Abstract
Networks-on-chip have been proposed as the interconnect solution for building large systems-on-chip. Such platforms will be made of hardware cores, running concurrently to achieve high compute power and keep power consumption low. These platforms have many things in common with distributed systems. In this article we analyze the issues related to mapping concurrent applications on a networks-on-chip based platform. We show that the quality of the decisions made at different stages of mapping has a high impact on the overall system performance. The critical stages of application mapping for networks-on-chip platforms include partitioning the application into processing cores, mapping the communication between the cores, and resolving platform-dependent problems such as race conditions and multipoint-to-point communications. We investigate these problems using an MPEG4 video decoder application and we evaluate the performance of the mapped system in a simulation environment, using a SystemC networks-on-chip simulator.
Keywords
network-on-chip; video coding; MPEG4 video decoder; SystemC; distributed systems; large systems-on-chip; mapping concurrent applications; multipoint-to-point communications; network-on-chip platforms; platform-dependent problems; processing cores; race conditions; Application software; Computational modeling; Data structures; Decoding; Energy consumption; Hardware; MPEG 4 Standard; Network-on-a-chip; Power system interconnection; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems Design and Implementation, 2005. IEEE Workshop on
ISSN
1520-6130
Print_ISBN
0-7803-9333-3
Type
conf
DOI
10.1109/SIPS.2005.1579856
Filename
1579856
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