Title :
Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links
Author :
Asadinia, Marjan ; Modarressi, Mehdi ; Tavakkol, Arash ; Sarbazi-Azad, Hamid
Author_Institution :
Dept. of Comput. Eng., Sharif Univ. of Technol., Kish, Iran
Abstract :
In this paper, we propose a processor allocation mechanism for run-time assignment of a set of communicating tasks of input applications onto the processing nodes of a Chip Multiprocessor (CMP), when the arrival order and execution lifetime of the input applications are not known a priori. This mechanism targets the on-chip communication and aims to reduce the power and latency of the NoC employed as the communication infrastructure. In this work, we benefit from the advantages of non-contiguous processor allocation mechanisms, by allowing the tasks of the input application mapped onto disjoint regions (sub-meshes) and then virtually connecting them by bypassing the router pipeline stages of the inter-region routers. The experimental results show considerable improvement over one of the best existing allocation mechanisms.
Keywords :
microprocessor chips; multiprocessing systems; network routing; network-on-chip; NoC; chip multiprocessor; inter-region routers; latency reduction; mesh-based CMP; networks-on-chip; noncontiguous processor allocation mechanism; on-chip communication; power reduction; router pipeline stages; virtual point-to-point links; Algorithm design and analysis; Bandwidth; Power demand; Registers; Resource management; Switches; System-on-a-chip; chip multiprocessors; contiguous allocation; network-on-Chip; non-contiguous allocation; performance; power consumption; processor allocation;
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location :
Grenoble
Print_ISBN :
978-1-61284-208-0
DOI :
10.1109/DATE.2011.5763072