Title :
Architecture definition of non-binary hardware processor & possible applications Possibility of processor for human like activities in robotics
Author_Institution :
Steel Authority of India Ltd., Rourkela Steel Plant, Rourkela, India
Abstract :
The multiprocessor and multivariate environment will be simplified with non-binary data processor (NBDP) that can read, process, and output in parallel multiple variables encoded with pulse position modulation (PPM) without intermediate A/D and digital-to-analog (D/A) converters. The NBDP defined herein is an improvement of Von Neumann Architecture. Variables are encoded as the time gap between start pulse (SP) and end pulse (EP). SP and EP are pulses of opposite polarities. Polarity of SP is sign of digit represented. NBDP has addition/subtraction unit incorporated with look-ahead-carry generation. Two monostable multivibrators in inverse parallel connection serve as temporary storage. Object of the NBDP is to use PPM to encode analog signals as non-binary data and process in parallel those non-binary data to create uniprocessor environment in a multiprocessor and multivariable environment; with future possibility of direct hardware realization of complex mathematical functions.
Keywords :
analogue processing circuits; carry logic; microprocessor chips; multiprocessing systems; multivibrators; parallel architectures; pulse circuits; pulse position modulation; NBDP; PPM encoding; Von Neumann architecture improvement; addition unit; analog signal encoding; end pulse; inverse parallel connection; look-ahead-carry generation; monostable multivibrators; multiprocessor environment; multivariate environment; nonbinary data processor; nonbinary hardware processor architecture; parallel multiple variables; parallel processing; pulse position modulation; start pulse; subtraction unit; uniprocessor environment; Capacitors; Clocks; Hardware; High definition video; Modulation; Process control; Zirconium; Analog processing circuits; Pulse circuits; Sampled data circuits; Switched capacitor circuits; Switching Logic circuits;
Conference_Titel :
India Conference (INDICON), 2012 Annual IEEE
Conference_Location :
Kochi
Print_ISBN :
978-1-4673-2270-6
DOI :
10.1109/INDCON.2012.6420613