DocumentCode
3080125
Title
Demand code paging for NAND flash in MMU-less embedded systems
Author
Baiocchi, José A. ; Childers, Bruce R.
Author_Institution
Dept. of Comput. Sci., Univ. of Pittsburgh, Pittsburgh, PA, USA
fYear
2011
fDate
14-18 March 2011
Firstpage
1
Lastpage
6
Abstract
NAND flash is preferred for code and data storage in embedded devices due to its high density and low cost. However, NAND flash requires code to be copied to main memory for execution. In inexpensive devices without hardware memory management, full shadowing of an application binary is commonly used to load the program. This approach can lead to a high initial application start-up latency and poor amortization of copy overhead. To overcome these problems, we describe a software-only demand-paging approach that incrementally copies code to memory with a dynamic binary translator (DBT). This approach does not require hardware or operating system support. With careful management, a savings can be achieved in total code footprint, which can offset the size of data structures used by DBT. For applications that cannot amortize full shadowing cost, our approach can reduce start-up latency by 50% or more, and improve performance by 11% on average.
Keywords
NAND circuits; embedded systems; flash memories; storage management chips; MMU-less embedded system; NAND flash; code footprint; data storage; demand code paging; dynamic binary translator; hardware memory management unit; software-only demand-paging approach; Ash; Flash memory; Hardware; Loading; Memory management; Shadow mapping; Software;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location
Grenoble
ISSN
1530-1591
Print_ISBN
978-1-61284-208-0
Type
conf
DOI
10.1109/DATE.2011.5763095
Filename
5763095
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