Title :
Bifurcated buffering in internal buffer banyan ATM switch
Author :
Radusinovic, Igor ; Petrovic, Z. ; Pejanovic-Djurisic, Milica
Author_Institution :
Dept. of EE, Montenegro Univ., Podgorica
Abstract :
In our paper we present a bifurcated buffer banyan ATM switch concept. Bifurcated input buffering was proposed previously for switches with input buffers. We expanded it to buffer a banyan ATM switch with internal input buffers. Here, we give a detailed description of the proposed switch performance analysis, based on the algorithm described in [3]. Our proposition advantages over the simple input buffer banyan are higher throughput and lower cell loss probability. We found that buffer size b=20, for input load p<0.78, is enough for obtaining the required ATM switch performance levels no matter the switch size. It means that cheap and simple input buffering is possible in bifurcated banyan ATM switching
Keywords :
asynchronous transfer mode; bifurcation; buffer storage; multistage interconnection networks; probability; telecommunication traffic; ATM switch; banyan switch; bifurcated buffering; cell loss probability; internal buffer; performance analysis; throughput; Asynchronous transfer mode; Bifurcation; Delay; Fabrics; Jitter; Performance analysis; Radio access networks; Switches; Throughput; Topology;
Conference_Titel :
ATM, 1999. ICATM '99. 1999 2nd International Conference on
Conference_Location :
Colmar
Print_ISBN :
0-7803-5428-1
DOI :
10.1109/ICATM.1999.786836