DocumentCode
3081189
Title
Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools
Author
Vissers, Kees ; Neuendorffer, Stephen ; Noguera, Juanjo
Author_Institution
Xilinx, San Jose, CA, USA
fYear
2011
fDate
14-18 March 2011
Firstpage
1
Lastpage
3
Abstract
Modern FPGAs enable complete system designs that include processors, interconnect systems, memory subsystems and a number of application functions that are implemented using High-Level Synthesis tools.
Keywords
field programmable gate arrays; high definition television; high level synthesis; AXI interface; FPGA; field programmable gate arrays; high level synthesis tool; interconnect system; memory subsystem; real-time HDTV application; Field programmable gate arrays; HDTV; Memory management; Pixel; Program processors; Quality of service; Streaming media; HDTV systems; High-Level Synthesis; image processing applications; processor subsystem;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
Conference_Location
Grenoble
ISSN
1530-1591
Print_ISBN
978-1-61284-208-0
Type
conf
DOI
10.1109/DATE.2011.5763144
Filename
5763144
Link To Document