A 70 Mb/s variable-rate 1024-QAM cable receiver IC with integrated 10 b ADC and FEC decoder

Author

Tan, Liansheng ; Putnam, J. ; Lu, Feng ; D´Luna, L. ; Mueller, Daniel ; Kindsfater, K. ; Cameron, Katherine ; Joshi, Rajan ; Hawley, Robert ; Samueli, H.

Author_Institution

Broadcom Corp., Irvine, CA, USA

fYear

1998

fDate

5-7 Feb. 1998

Firstpage

200

Lastpage

201

Abstract

A variable-rate IF-sampled QAM receiver integrated circuit operates at symbol rates from 1 to 7 MBaud in 4, 16, 32, 64, 128, 256, and 1024-QAM. The QAM receiver is a monolithic mixed-signal device implemented in a 0.5 /spl mu/m triple-level metal single-poly CMOS process. The device incorporates a 10b A/D converter, analog PLLs, interpolating demodulator, square-root raised cosine receive filters, timing/carrier recovery loops, 20-tap complex equalizer, and a Reed-Solomon forward error correction (FEC) decoder that is compliant with European digital video broadcasting (DVB) and Digital Audio-Visual Council (DAVIC) standards. Applications of this QAM receiver include digital cable-TV set-top terminals, cable modems, and digital microwave radios.

Keywords

quadrature amplitude modulation; 0.5 micron; 10 bit; 70 Mbit/s; A/D converter; Reed-Solomon forward error correction decoder; monolithic mixed-signal device; triple-level metal single-poly CMOS process; variable-rate IF-sampled QAM cable receiver integrated circuit; Analog-digital conversion; CMOS process; Demodulation; Digital filters; Digital video broadcasting; Equalizers; Forward error correction; Microwave filters; Quadrature amplitude modulation; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1998. Digest of Technical Papers. 1998 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-4344-1

Type

conf

DOI

10.1109/ISSCC.1998.672434

Filename

672434