• DocumentCode
    3081592
  • Title

    QTIB: Quick bit-reversed permutations on CPUs

  • Author

    Knittel, G.

  • Author_Institution
    Max-Planck-Inst. for Radio Astron., Bonn, Germany
  • fYear
    2011
  • fDate
    6-8 July 2011
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    We present a fast algorithm for out-of-place bit-reversed permutation of large vectors for input to an FFT. It is an extension of two previously published methods with special consideration of advanced CPU hardware features. In particular, the method makes heavy use of cache prefetching, MMX and SSE units, and write-combining buffers. Implementations have been made in assembly language for 2-byte and 4-byte operands. In terms of efficiency the method significantly outperforms previously reported methods.
  • Keywords
    cache storage; fast Fourier transforms; storage management; CPU hardware feature; FFT; MMX units; QTIB; SSE units; assembly language; cache prefetching; out-of-place bit-reversed permutation; quick bit-reversed permutations; write-combining buffers; Bandwidth; Graphics processing unit; Indexes; Layout; Prefetching; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital Signal Processing (DSP), 2011 17th International Conference on
  • Conference_Location
    Corfu
  • ISSN
    Pending
  • Print_ISBN
    978-1-4577-0273-0
  • Type

    conf

  • DOI
    10.1109/ICDSP.2011.6004879
  • Filename
    6004879