DocumentCode
3082150
Title
High performance VLSI architecture for data clustering targeted at computer vision
Author
Hernandez, Orlando J.
fYear
2005
fDate
8-10 April 2005
Firstpage
99
Lastpage
104
Abstract
This paper presents a high performance architecture for the important task of unsupervised data clustering in computer vision applications. This architecture is suitable for VLSI implementation, as it exploits paradigms of massive connectivity like those inspired by neural networks, and parallelism and functionality integration that can be afforded by emerging nanometer semiconductor technologies. By utilizing a "global-systolic, local-hyper-connected" architectural approach, this architecture can be suitable for the processing of real time DVD quality video at the highest rate allowed by the MPEG-2 standard. This implies a performance improvement of 118 times or better than approaches using conventional compute platforms.
Keywords
VLSI; computer vision; integrated circuit design; nanoelectronics; parallel architectures; pattern clustering; systolic arrays; video signal processing; MPEG-2 standard; VLSI architecture; VLSI implementation; computer vision; functionality integration; global-systolic local-hyper-connected architectural approach; massive connectivity paradigms; nanometer semiconductor technologies; neural networks; parallelism; real time DVD quality video processing rate; unsupervised data clustering; Application software; Clustering algorithms; Color; Computer architecture; Computer vision; Hardware; High performance computing; Image segmentation; Neural networks; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
SoutheastCon, 2005. Proceedings. IEEE
Print_ISBN
0-7803-8865-8
Type
conf
DOI
10.1109/SECON.2005.1423226
Filename
1423226
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