DocumentCode :
3083004
Title :
Regular Quasi-cyclic LDPC Codes with Girth 6 from Prime Fields
Author :
Zheng, Qingji ; Li, Xiangxue ; Zheng, Dong ; Guo, Baoan
Author_Institution :
Dept. of Comput. Sci., Univ. of Texas at San Antonio, San Antonio, TX, USA
fYear :
2010
fDate :
15-17 Oct. 2010
Firstpage :
470
Lastpage :
473
Abstract :
The short paper proposes a method for constructing regular quasi-cyclic (QC) LDPC codes based on circulant permutation matrices via simple prime field operations. The main advantage is that regular QC LDPC codes with a variety of block lengths and rates can be easily constructed which have no cycles of length four or less. Simulation results show that within only a maximum of ten decoding iterations of sum-product algorithm(SPA) the constructed regular codes of high rates have no error floor down to the bit-error rate of 10-7.
Keywords :
cyclic codes; decoding; error statistics; matrix algebra; parity check codes; Girth 6; bit error rate; block length; circulant permutation matrix; decoding iteration; error floor down; prime field operation; regular quasicyclic LDPC code; sum product algorithm; AWGN; Bit error rate; Encoding; Iterative decoding; Matrices; Sparse matrices; Shannon limit; error floor; prime field; quasi-cyclic LDPC;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP), 2010 Sixth International Conference on
Conference_Location :
Darmstadt
Print_ISBN :
978-1-4244-8378-5
Electronic_ISBN :
978-0-7695-4222-5
Type :
conf
DOI :
10.1109/IIHMSP.2010.120
Filename :
5635634
Link To Document :
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