3D Path finder methodology for the design of 3DICs and interposers

3D technology is emerging as a mechanism to continue Moore´s Law for 3D ICs. Similarly, interposer technology is being viewed as a method to continue “More than Moore” scaling. With both these technologies providing significantly improved integration levels as compared to other options, the electronics industry is preparing itself for the next semiconductor revolution. With 3D technology still in its infancy, we introduce the concept of path finding in this paper, which is an exploratory phase in the design cycle where early decisions can be made on the technologies to use, the structures to design and the process parameters to define to obtain the appropriate responses. This paper covers the 3D Path Finder (3DPF) methodology which includes model development (user interface) and numerical solver. One example is covered to show the attractiveness of using an exploratory tool such as 3DPF early in the design cycle.