• DocumentCode
    3083546
  • Title

    Error correcting code analysis for cache memory high reliability and performance

  • Author

    Rossi, Daniele ; Timoncini, Nicola ; Spica, Michael ; Metra, Cecilia

  • Author_Institution
    DEIS, U. of Bologna, Bologna, Italy
  • fYear
    2011
  • fDate
    14-18 March 2011
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    In this paper we address the issue of improving ECC correction ability beyond that provided by the standard SEC/DED Hsiao code. We analyze the impact of the standard SEC/DED Hsiao ECC and for several double error correcting (DEC) codes on area overhead and cache memory access time for different codeword sizes and code-segment sizes, as well as their correction ability as a function of codeword/code-segment sizes. We show the different trade-offs that can be achieved in terms of impact on area overhead, performance and correction ability, thus giving insight to designers for the selection of the optimal ECC and codeword organization/code-segment size for a given application.
  • Keywords
    cache storage; error correction codes; ECC correction ability; area overhead; cache memory access time; code-segment sizes; codeword organization; codeword sizes; double error correcting codes; error correcting code analysis; optimal ECC; standard SEC/DED Hsiao code; Arrays; Decoding; Delay; Encoding; Error correction codes; Logic gates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011
  • Conference_Location
    Grenoble
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-61284-208-0
  • Type

    conf

  • DOI
    10.1109/DATE.2011.5763257
  • Filename
    5763257