On-chip decouplig capacitor preplacement for power integrity enhancement

With the rapid technology scaling, logic devices are more susceptible to power distribution network (PDN) power noise. To relieve power noise, traditionally the gate capacitance of transistor is used for on-chip decoupling capacitor (decap). In this paper, we investigate the power integrity characteristics of on-chip decap, such as power noise and current consumption, and propose the decap preplacement flow to relieve them. Compared to the non-preplacement approach, experimental results show the worst instantaneous voltage drop(IVD) can be reduced by about 7.16% and average supply current can be reduced by 3.05% by using preplacement scheme.