Title :
Implementation of Single-Phase PLL Based on FPGA
Author :
Zheng-xiang Xu ; Xiao-qiong He ; Ze-liang Shu ; Yuan Wang ; Ying-ying Zhou
Author_Institution :
Sch. of Electr. Eng., Southwest Jiaotong Univ. Chengdu, Chengdu, China
Abstract :
In this paper, Two control methods for single-phase phase-locked loop(PLL) have been studied and validated based on a system developed by field programmable gate array (FPGA). By using hardware description language verilog HDL, the cycle integrator, the PI regulator, the sine and cosine module of single-phase PLL control system have been set up. Software analysis and hardware simulation have been given to prove the phase lock function of the two methods, but EPLL has a better steady-state performance.
Keywords :
electronic engineering computing; field programmable gate arrays; hardware description languages; phase locked loops; FPGA; PI regulator; Verilog HDL; cosine module; cycle integrator; field programmable gate array; hardware description language; phase-locked loop; single-phase PLL; EPLL; FPGA; pPLL;
Conference_Titel :
Mechanical and Automation Engineering (MAEE), 2013 International Conference on
Conference_Location :
Jiujang
DOI :
10.1109/MAEE.2013.50