On Derating Soft Error Probability Based on Strength Filtering

Soft errors caused by ionizing radiation have emerged as a major concern for current generation of CMOS technologies and the trend is expected to get worse. A significant fraction of soft errors in semiconductor has been reported to never lead to a system failure. System level soft-error rate (SER) analysis shows that soft-error in internal circuit nodes frequently fail to propagate to an observable point due to Boolean filtering and latching window filtering. A previous study shows that when soft-error is viewed as an analog signal distortion rather than a digital error, it often disappears during signal propagation due to error signal attenuation. This has been termed as electrical filtering. Electrical filtering in system level soft-error rate analysis is expensive because it involves circuit level simulation. In this paper, we present an electrical filtering technique that treats soft-errors as digital errors, but uses analog strengths to decide whether such errors can propagate. We call this technique strength filtering. Strength filtering does not involve SPICE simulation, hence it is computationally efficient. Used as a pre-processing step, strength filtering improves the efficiency of system level soft-error rate analysis. Experimental results on ISCAS-85 benchmark circuits show that an average of ~38% of the soft errors have no potential impact on the system level behavior and therefore, can be filtered out to improve both accuracy and efficiency of soft rate estimation process.