Advanced R&D to volume production in 300 mm

Author

Montier, Michel ; Henry, Martin

Author_Institution

STMicroelectronics, Crolles, France

fYear

1999

fDate

1999

Firstpage

9

Lastpage

11

Abstract

The semiconductor industry is seeing a rapid increase in wafer fab requirements due to fast evolution of processes towards the 0.1 μm technology node. Over the past few years, STMicroelectronics has developed the flexible pilot line concept, combining R&D constraints and manufacturing requirements to accelerate the transfer of basic processes to industrial technologies. The flexible fab concept has been tested at the 0.5/0.25 μm level for nonvolatile memories and ASIC products and is being repeated for the 0.18/0.1 μm generations. A fast transition from research to manufacturing, and reduced development time and manufacturing ramp up becomes more challenging with increasing process complexity, performance requirements and cost constraints. At present, discussions are taking place worldwide about the relative advantages of 300 mm wafer conversion and how to specify new fabs in an economical way. Other active debates are related to shrinkage strategies and how to sustain high R&D costs induced by acceleration towards small geometries. This paper describes the needs for a flexible 300 mm fab aimed for production of ASIC products. We analyse how 200 mm experience gained with advanced CMOS technologies can be extended to new CMOS process generations

Keywords

CMOS integrated circuits; application specific integrated circuits; flexible manufacturing systems; integrated circuit design; integrated circuit manufacture; integrated circuit technology; research and development management; 0.1 micron; 0.18 micron; 0.25 micron; 0.5 micron; 200 mm; 300 mm; ASIC products; CMOS process generations; CMOS technologies; IC geometries; R&D constraints; R&D costs; cost constraints; development time; flexible fab concept; flexible pilot line concept; manufacturing ramp up; manufacturing requirements; nonvolatile memories; performance requirements; process complexity; process evolution; process transfer; research-to-manufacturing transition; semiconductor industry; volume production; wafer size; wafer size conversion; Acceleration; Application specific integrated circuits; CMOS process; CMOS technology; Costs; Electronics industry; Flexible manufacturing systems; Manufacturing processes; Production; Semiconductor device manufacture;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology, 1999. IEEE International Conference

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-5174-6

Type

conf

DOI

10.1109/IITC.1999.787063

Filename

787063