Title :
A single-amplifier 6-bit CMOS pipeline A/D converter for WCDMA receivers
Author :
Sumanen, Lauri ; Halonen, Kari
Author_Institution :
Lab. of Eletron. Circuit Design, Helsinki Univ. of Technol., Espoo, Finland
Abstract :
An embedded single-amplifier 6-bit 15.36 MS/s CMOS pipeline A/D converter for WCDMA receivers is presented. By sharing an operational amplifier with two sequential stages and by using a mismatch insensitive dynamic comparator a total power dissipation of only 12 mW from 2.7 V supply is achieved. Special emphasis is put on the reduction of substrate noise coupling from the ADC´s to the low noise amplifier and a very good isolation is achieved. The ADC´s are implemented in a 0.35-μm BiCMOS technology using only CMOS transistors and occupying 0.45 mm2. According to the measurements, a DNL and INL of 0.27 LSB and 0.18 LSB are achieved while the SFDR and SNDR are 50 dB and 36 dB, respectively
Keywords :
CMOS integrated circuits; analogue-digital conversion; code division multiple access; integrated circuit noise; operational amplifiers; pipeline processing; radio receivers; 0.35 micron; 12 mW; 2.7 V; 6 bit; A/D converter; BiCMOS technology; CMOS pipeline ADC; CMOS transistors; LNA; WCDMA receivers; low noise amplifier; mismatch insensitive dynamic comparator; operational amplifier; sequential stages; single-amplifier ADC; substrate noise coupling reduction; wideband CDMA; BiCMOS integrated circuits; CMOS technology; Isolation technology; Low-noise amplifiers; Multiaccess communication; Noise reduction; Operational amplifiers; Pipelines; Power amplifiers; Power dissipation;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.921923
