Title :
The investigation of electroplating deposited copper films for advanced VLSI interconnection
Author :
Chen, H.C. ; Yang, M.S. ; Wu, J.Y. ; Lur, W.
Author_Institution :
Dept. of Adv. Technol. Dev., United Microelectron. Corp., Hsin-Chu, Taiwan
Abstract :
The characteristics of electroplating deposited (EPD) copper films after annealing are investigated by means of sheet resistance, film hardness, film stress, surface roughness, and the chemical mechanical polishing process. Films annealed at 150°C showed very similar behavior to those annealed at room temperature for three days in many aspects, including sheet resistance, hardness, surface morphology, and CMP polish rate. Annealing at temperatures higher than 300°C resulted in lower sheet resistance, larger grain size, and rougher surfaces, as well as better CMP performance. Atomic force microscopy showed that the surface was rougher as the annealing temperature increased. Better CMP polish rate and uniformity were obtained on fully recrystallized films. Therefore, post-EPD annealing at about 300°C to stabilize the copper films is necessary for better CMP process performance
Keywords :
VLSI; annealing; atomic force microscopy; chemical mechanical polishing; copper; electroplating; grain size; hardness; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; integrated circuit testing; internal stresses; recrystallisation; surface topography; 150 C; 20 C; 3 day; 300 C; CMP performance; CMP polish rate; CMP process performance; CMP uniformity; Cu; EPD copper films; VLSI interconnection; annealing; annealing temperatures; atomic force microscopy; chemical mechanical polishing process; copper film stabilization; electroplating deposited copper films; film hardness; film stress; grain size; post-EPD annealing; recrystallized films; sheet resistance; surface morphology; surface roughness; Annealing; Atomic force microscopy; Chemical processes; Copper; Rough surfaces; Stress; Surface morphology; Surface resistance; Surface roughness; Temperature;
Conference_Titel :
Interconnect Technology, 1999. IEEE International Conference
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-5174-6
DOI :
10.1109/IITC.1999.787080
