Expansion of SRAM operation margin by adaptive voltage supply

Author

Kishida, Kuinharu ; Tsujii, Tomohiro ; Makino, Hiroaki ; Yoshimura, Tetsuzo ; Iwade, Shuhei ; Matsuda, Yuuki

Author_Institution

Grad. Sch. of Inf. Sci. & Technol., Osaka Inst. of Technol., Osaka, Japan

fYear

2013

fDate

5-6 June 2013

Firstpage

104

Lastpage

105

Abstract

This paper describes the expansion of the operation margin of the SRAM by optimizing the supply voltage condition. To find the optimum voltage, the whole SRAM circuit is designed, which includes the worst case memory cells for the read and the write operations considering the local Vth fluctuation. By the SPICE simulation using 45-nm parameters, successful operation is obtained for wide Vth range by controlling voltages of the word line, the power line and the GND line of memory cells. As a result, the stable operation was confirmed for the wide Vth range of 0.25V-0.65V. By using these results, we can rescue a lot of LSIs which fail under the normal voltage condition.

Keywords

SPICE; SRAM chips; circuit simulation; integrated circuit design; power supply circuits; GND line; LSI; SPICE simulation; SRAM circuit design; SRAM operation margin; Vth fluctuation; adaptive voltage supply; normal voltage condition; optimum voltage; power line; read and the write operations; size 45 nm; supply voltage condition; voltage 0.25 V to 0.65 V; word line; worst case memory cells; Fluctuations; Integrated circuit modeling; Random access memory; SPICE; Threshold voltage; Transistors; Voltage control; SRAM; adaptive voltage supply; fluctuation; operation margin; threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Future of Electron Devices, Kansai (IMFEDK), 2013 IEEE International Meeting for

Conference_Location

Suita

Print_ISBN

978-1-4673-6106-4

Type

conf

DOI

10.1109/IMFEDK.2013.6602260

Filename

6602260