DocumentCode
3085421
Title
IEEE1394 system simulation environment and a design of its link layer controller
Author
Chikamura, Keishi ; Izumi, Tomonori ; Onoye, Takao ; Nakamura, Yoshihiko
Author_Institution
Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan
Volume
5
fYear
2001
fDate
2001
Firstpage
1
Abstract
A system simulation environment is constructed dedicatedly for IEEE1394 high speed digital communication. In this environment, various network transactions inherent in communication systems are taken into account for system simulation, which is indispensable to enable IP (Intellectual Property)-based design of the systems. By using the proposed environment, a link layer controller of IEEE1394 is implemented with great ability of network transactions as well as connectivities with physical layer chips. Co-simulation between Verilog-HDL description of the link layer and C++ behavioral description of the physical layer has been carried out to verify the functionalities of the designed controller. FPGA implementation result of the link layer controller is also shown
Keywords
application specific integrated circuits; discrete event simulation; hardware description languages; hardware-software codesign; industrial property; integrated circuit design; large scale integration; network interfaces; protocols; FPGA implementation; IEEE1394 high speed digital communication; Verilog-HDL description; behavioral description; intellectual property based design; link layer controller; network transactions; system simulation environment; Application software; Communication system control; Computational modeling; Hardware design languages; Network interfaces; Peer to peer computing; Physical layer; Protocols; Streaming media; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location
Sydney, NSW
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921969
Filename
921969
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