Intrinsic electrical properties of Cu/low-k interconnection

Author

Bersuker, G. ; Blaschke, V. ; Pekker, D. ; Wick, D.

Author_Institution

Sematech, Austin, TX, USA

fYear

1999

fDate

1999

Firstpage

173

Lastpage

175

Abstract

Electrical characterization of Cu/low-k ILD structures was performed to address intrinsic material properties. It was shown that ionic conduction due to contamination inherent to the dielectric was the leading cause of an intrinsic intra-metal line leakage current at low temperatures, while at elevated temperatures, a contribution from electron current was detected. Dielectric and barrier layer parameters that control the conduction process were evaluated

Keywords

copper; dielectric thin films; impurity distribution; integrated circuit interconnections; integrated circuit measurement; integrated circuit metallisation; integrated circuit reliability; ionic conductivity; leakage currents; permittivity; Cu; Cu/low-k ILD structures; Cu/low-k interconnection; barrier layer parameters; conduction process; dielectric contamination; dielectric layer parameters; electrical characterization; electron current; intrinsic electrical properties; intrinsic intra-metal line leakage current; intrinsic material properties; ionic conduction; Atherosclerosis; Copper; Dielectric materials; Dielectrics and electrical insulation; Electrons; Leakage current; Silicon; Temperature; Testing; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Interconnect Technology, 1999. IEEE International Conference

Conference_Location

San Francisco, CA

Print_ISBN

0-7803-5174-6

Type

conf

DOI

10.1109/IITC.1999.787113

Filename

787113