Title :
Performance estimators for hardware/software co-design
Author :
Theriault, L. ; Auder, D. ; Savaria, Yvon
Author_Institution :
Dept. des Sci. Appl., Univ. du Quebec, Chicoutimi, Que., Canada
Abstract :
This paper proposes hardware/software performance estimators (or metrics) allowing one to analyze the structure of applications written in ANSI C language. These metrics can determine, according to a target architecture, which basic blocks (loops or nested loops) of a gives application are worth embedding into hardware in order to increase the execution speed of the whole application. A FPGA-based reconfigurable system is targeted to implement these blocks
Keywords :
C language; field programmable gate arrays; hardware-software codesign; ANSI C language; FPGA-based reconfigurable system; hardware/software co-design; performance estimators; performance metrics; Acceleration; Application software; Computer architecture; Coprocessors; Field programmable gate arrays; Gain measurement; Hardware; Parallel processing; Software measurement; Software performance;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.921973
