Title :
Study of Co silicidation process for 0.18/0.15μm CMOS technology
Author :
Hengsheng, Hu ; Shoumian, Chen
Author_Institution :
Shanghai IC R&D Center, China
Abstract :
In this paper, two approaches to form CoSi2, Co/Ti and Co/TiN, were studied. It was found that reactive Ti was helpful to reduce the influence of surface condition with non-uniform monosilicide formation even without surface cleaning. However, Co/TiN without surface cleaning could not form monosilicide at all. When the thermal budget of RTP2 is too high, the disilicide on Boron doped polylines was easier to be degraded, both poor Rsh distribution and rougher surface were seen. Based on stable Rsh and junction leakage performance of patterned wafers, it can be said that the Co salicide process is successfully being developed for 0.18μm technology, and has the capability to be extended to at least 0.15μm technology.
Keywords :
CMOS integrated circuits; boron; cobalt compounds; contact resistance; surface cleaning; titanium; titanium compounds; 0.15 micron; 0.15μm CMOS technology; 0.18 micron; 0.18μm CMOS technology; Co silicidation process; Co-Ti; Co-TiN; CoSi2; RTP2; junction leakage performance; monosilicide formation; patterned wafers; reactive Ti; surface cleaning; surface condition; thermal budget; CMOS process; CMOS technology; Cleaning; Conductivity; Contact resistance; Silicidation; Silicides; Temperature distribution; Tin; Wet etching;
Conference_Titel :
Junction Technology, 2004. IWJT '04. The Fourth International Workshop on
Print_ISBN :
0-7803-8191-2
DOI :
10.1109/IWJT.2004.1306780
