Enhanced electromigration resistance through grain size modulation in copper interconnects

Grain size modulation in Cu interconnects was achieved at an elevated anneal temperature of 250 °C. As compared to the conventional annealing at 100 °C, the elevated process enabled further Cu grain growth, which then resulted in an increased grain size and improved electromigration resistance in the Cu interconnects. In order to prevent stress migration reliability degradation from the elevated annealing process, a TaN metal passivation layer was deposited on the Cu interconnect surface prior to the thermal annealing process, which suppressed void formation within the Cu features during the anneal process and reduced inelastic deformation within the interconnects after cooling down to room temperature.