Design of a set logic network based on frequency multiplexing and its applications to image processing

An ultra-higher-valued logic network, called a set logic network, is proposed to provide a potential solution to the interconnection problems in VLSI systems. The basic concept is frequency multiplexing of logic values for the increase of information density in logic networks. It is shown that the set logic network can be constructed with only two basic building blocks realized by frequency-selective analog circuits. Its application to a parallel image processor is discussed based on functional multiplexing of binary modules into a single set logic module. A great reduction of interconnections can be achieved by using an optimal multiplexing scheme