DocumentCode :
3087738
Title :
ESD design rule checker
Author :
Li, Q. ; Huh, Y.J. ; Chen, J.W. ; Bendix, P. ; Kang, S.M.
Author_Institution :
IBM Microelectron., Fishkill, NY, USA
Volume :
5
fYear :
2001
fDate :
2001
Firstpage :
499
Abstract :
Electrostatic discharge (ESD) protection circuitry is essential for every I/O cell design and has its own set of design rules. These design rules are not only complex but also beyond the scope of commercial DRC tools. In this paper, we present the framework of our ESD design rule checker, and address some of the open issues in the ESD design rule checker presented by Sinha et al. (1998)
Keywords :
circuit layout CAD; electrostatic discharge; integrated circuit layout; protection; ESD design rule checker; ESD protection circuitry; I/O cell design; IC layout; electrostatic discharge protection; Circuit synthesis; Contracts; Driver circuits; Electrostatic discharge; Large scale integration; Logic circuits; Logic design; Logic devices; Microelectronics; Protection;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
Type :
conf
DOI :
10.1109/ISCAS.2001.922094
Filename :
922094
Link To Document :
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