DocumentCode :
3087870
Title :
Near ballistic sub-7 nm Junctionless FET featuring 1 nm extremely-thin channel and raised S/D structure
Author :
Kian Hui Goh ; Yan Guo ; Xiao Gong ; Geng-Chiau Liang ; Yee-Chia Yeo
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore (NUS), Singapore, Singapore
fYear :
2013
fDate :
9-11 Dec. 2013
Abstract :
In this work, we report the realization of In0.53Ga0.47As Junctionless FET (JLFET) with the shortest reported channel length LCH (6 nm) for any III-V transistors. The JLFET features a 1 nm-thick extremely-thin channel sandwiched between a 1 nm-thick InP cap and the InP substrate, and a heavily doped raised S/D structure. Peak transconductance Gm. Peak of 1480 μS/μm at VDS = 0.7 V with an EOT of 2.5 nm and an ultra-low S/D resistance RSD of 165 Ω.μm were achieved. In addition, the ballistic behavior of sub-7 nm III-V transistors was experimentally investigated by using a novel extraction approach for the first time. The In0.53Ga0.47As JLFET with LCH of 6 nm was demonstrated to have a mean free path λ of 27.2 nm and nearly ballistic transport with ballistic efficiency B of 0.82.
Keywords :
III-V semiconductors; MOSFET; ballistic transport; gallium arsenide; indium compounds; III-V transistors; In0.53Ga0.47As; InP; InP cap; InP substrate; JLFET; ballistic behavior; ballistic junctionless FET; ballistic transport; channel length; extremely-thin channel; raised S-D structure; size 1 nm; size 7 nm; transconductance; Aluminum oxide; Ballistic transport; Indium phosphide; Logic gates; MOSFET; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2013 IEEE International
Conference_Location :
Washington, DC
Type :
conf
DOI :
10.1109/IEDM.2013.6724643
Filename :
6724643
Link To Document :
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