Title :
Efficient concurrent simulation of large networks using various fault models
Author :
Weststrate, Evan ; Panetta, Karen
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Tufts Univ., Medford, MA, USA
Abstract :
An improved fault simulation environment is described, and details of its faulting capability are presented and tested. The versatility of our fault simulator in handling different fault models by adding new activity functions to our modeling structure such as n-terminal bridge faults is shown. We use our TUFTsim simulator, which is based on concurrent simulation algorithms to efficiently fault-simulate large networks, and the multiple list traversal mechanism handles the propagation of concurrent elements through the topology. Results on some of the ITC ´99 benchmarks are shown based on the stuck-at and logical bridge fault models. The use of the bridge fault in combination with the stuck-at model does not depreciate the simulation efficiency
Keywords :
circuit simulation; fault simulation; logic testing; parallel algorithms; ITC ´99 benchmarks; TUFTsim simulator; activity functions; concurrent simulation algorithms; fault models; fault simulation; large networks; logical bridge faults; multiple list traversal mechanism; stuck-at faults; Bridge circuits; Circuit faults; Circuit simulation; Complexity theory; Computational modeling; Computer simulation; Data structures; Educational institutions; Network topology; Testing;
Conference_Titel :
Simulation Symposium, 2001. Proceedings. 34th Annual
Conference_Location :
Seattle, WA
Print_ISBN :
0-7695-1092-2
DOI :
10.1109/SIMSYM.2001.922114