Design and FPGA-Implementation of a Flexible Text Search-based Spam-Stopping Firewall

In this paper spam stopping firewalls are implemented through approximate text search algorithms, based on a systolic array paradigm. The implemented architecture works for patterns that contain don´t cares, or, complement, and sub range symbols. A software implementation of an approximate text search algorithm has been made using the C programming language. Moreover, a hardware implementation is realized by choosing the appropriate architecture using system on a programmable chip (SOPC) board. The performance of the implemented hardware is tested and compared with the software firewall. Hardware implementation gives the firewall the high speed that most computer networks need. Moreover, field programmable gate arrays (FPGAs) give the firewall the required flexibility and programmability to load new patterns into the firewalls. The performance evaluation for the software and hardware implementations shows that, for the used technologies, the hardware tends to be order of magnitude faster than the software