Title :
A serial link transceiver for USB2 high-speed mode
Author :
Jou, Shyh-Jye ; Kuo, Shu-Hua ; Chiu, Jui-Ta ; King, Chu ; Lee, Chien-Hsiung ; Liu, Tim
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan
Abstract :
The Universal Serial Bus (USB) technology is now becoming an integral part of the personal computer platform. In this paper, the transceiver architecture and circuits are proposed and implemented for USB2 high-speed mode with 480 Mb/s bandwidth. This physical layer of USB2 consists of transmitter, receiver, two envelope detectors and an all-digital clock recovery/data synchronization blocks. It has been implemented with UMC 0.35 μm 1P4M 3.3 V CMOS technology and consumes only 156 mW
Keywords :
CMOS digital integrated circuits; peripheral interfaces; synchronisation; transceivers; 0.35 micron; 156 mW; 3.3 V; 480 Mbit/s; CMOS technology; USB2 high-speed mode; all-digital clock recovery/data synchronization blocks; envelope detectors; physical layer; serial link transceiver; transceiver architecture; universal serial bus; Bandwidth; CMOS technology; Circuits; Computer architecture; Envelope detectors; Microcomputers; Physical layer; Transceivers; Transmitters; Universal Serial Bus;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922172
