• DocumentCode
    3089556
  • Title

    The circuit design of multiple-valued logic voltage-mode adders

  • Author

    Thoidis, I.M. ; Soudris, D. ; Fernandez, J.M. ; Thanailakis, A.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Democritus Univ. of Thrace, Xanthi, Greece
  • Volume
    4
  • fYear
    2001
  • fDate
    6-9 May 2001
  • Firstpage
    162
  • Abstract
    Novel quaternary half adder, full adder, and a carry-lookahead adder are introduced. The proposed circuits are static and operate in voltage-mode. Moreover, there is no current flow in steady states, and thus no static power dissipation. Although the comparison in transistor count shows that the proposed quaternary circuits are larger than two respective binary ones, benefits in parallel addition arise from the use of multiple-valued logic. Firstly, the ripple-carry additions are faster because the number of carries are half compared to binary ones and the delay from the input carry through the output carry is relatively small. Secondly, the carry-lookahead scheme exhibits less complexity, which leads to overall reduction in transistor count for addition with a large number of bits
  • Keywords
    MOS logic circuits; adders; carry logic; integrated circuit design; multivalued logic circuits; parallel architectures; carry-lookahead adder; circuit design; full adder; input carry; multiple-valued logic; output carry; parallel addition; quaternary half adder; ripple-carry additions; transistor count; voltage-mode adders; Adders; Circuit synthesis; Energy consumption; Logic circuits; Logic design; MOSFETs; Power dissipation; Software systems; Steady-state; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
  • Conference_Location
    Sydney, NSW
  • Print_ISBN
    0-7803-6685-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2001.922197
  • Filename
    922197