• DocumentCode
    3089764
  • Title

    Factors affecting the interconnection resistance and yield in the fabrication of multilayer polyimide/metal thin film structures

  • Author

    Shih, D.-Y. ; Yeh, H. ; Narayan, C. ; Lewis, J. ; Graham, W. ; Nunes, S. ; Paraszczak, J. ; McGouey, R. ; Galligan, E. ; Cataldo, J. ; Serino, R. ; Perfecto, E. ; Chang, C.-A. ; Deutsch, A. ; Rothman, L. ; Ritsko, J. ; Wilczynski, J.

  • Author_Institution
    IBM, Thomas J. Watson Res. Center, Yorhtown Heights, NY, USA
  • fYear
    1992
  • fDate
    18-20 May 1992
  • Firstpage
    1002
  • Lastpage
    1014
  • Abstract
    The use of a lift-off technique to fabricate a high-density structure consisting of multiple layers of metal/polyimide thin film structure on a silicon substrate is described. To achieve better performance and high yield, the authors evaluated the process design, the processing parameters, and the thickness of the Cr/Cu/Cr metallurgy, along with the use of suitable polyimide dielectrics. The plasma processing conditions, the types of passivation metals on Cu, and the use of a siloxane-polyimide as the gap-fill etch-stop material were all shown to play a very critical role in affecting the interconnection resistance and yield of the multilayer thin film structures. By optimizing these parameters the feasibility of fabricating high-density thin film wiring layers with good yield is demonstrated
  • Keywords
    contact resistance; integrated circuit technology; metallisation; packaging; passivation; polymer films; sputter etching; thin film circuits; Cr-Cu-Cr; Cr/Cu/Cr; Si substrate; fabrication; gap-fill etch-stop material; high-density structure; interconnection resistance; lift-off technique; multilayer polyimide/metal thin film structures; passivation metals; plasma processing; process design; processing parameters; siloxane-polyimide; thickness; wiring layers; yield; Chromium; Dielectric substrates; Dielectric thin films; Passivation; Plasma applications; Plasma materials processing; Polyimides; Process design; Semiconductor thin films; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 1992. Proceedings., 42nd
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-0167-6
  • Type

    conf

  • DOI
    10.1109/ECTC.1992.204328
  • Filename
    204328