Title :
On finite precision implementation of low density parity check codes decoder
Author :
Zhang, Tong ; Wang, Zhongfeng ; Parhi, Keshab K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
Abstract :
In this paper, we analyze the finite precision effects on the decoding performance of Gallager´s low density parity check (LDPC) codes and develop optimal finite word lengths of variables as far as the tradeoffs between the performance and hardware complexity are concerned. We have found that 4 bits and 6 bits are adequate for representing the received data and extrinsic information, respectively. Simulation results indicate that the quantization scheme we have developed for the LDPC decoder is effective in approximating the infinite precision implementation
Keywords :
decoding; quantisation (signal); roundoff errors; finite precision analysis; finite word length optimization; hardware complexity; low density parity check codes decoder; quantization; AWGN; Additive white noise; Electronic mail; Hardware; Iterative algorithms; Iterative decoding; Parity check codes; Performance analysis; Quantization; Turbo codes;
Conference_Titel :
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Conference_Location :
Sydney, NSW
Print_ISBN :
0-7803-6685-9
DOI :
10.1109/ISCAS.2001.922207
