Suppression of die-to-die delay variability of silicon on thin buried oxide (SOTB) CMOS circuits by balanced P/N drivability control with back-bias for ultralow-voltage (0.4 V) operation

Small-variability transistors such as silicon on thin buried oxide (SOTB) are effective for reducing the operation voltage (V_dd). In the ultralow-V_dd regime, however, the upsurging delay (τ_pd) variability is the most important challenge. This paper proposes the balanced n/p drivability control method for reducing the die-to-die delay variation by back bias applicable for various circuits. Excellent variability reduction by this balanced control is demonstrated at V_dd = 0.4 V.