DocumentCode :
3090241
Title :
Built-in self-test for flash memory embedded in SoC
Author :
Banerjee, Shibaji ; Chowdhury, Dipanwita Roy
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur
fYear :
2006
fDate :
17-19 Jan. 2006
Lastpage :
384
Abstract :
Flash memories are a type of nonvolatile memory, which are becoming more and more popular for system-on-chip. But, flash memories are suffered by different types of disturb faults. In the present paper, some new disturb faults that may appear in flash memory are proposed. A modifies March algorithm is developed to detect these faults. Finally, an embedded processor-based built-in self-test (BIST) design is implemented for embedded memories. The proposed method utilizes the concept of reusing the processor in SoC environment. By reusing the embedded processor, the area overhead due to BIST can be reduced to a great extent. The area overhead is only due to the circuits required to design memory wrapper cell. The experimental results show that the area overhead due to BIST is less than 1% for a typical 256K flash memory
Keywords :
built-in self test; flash memories; integrated circuit testing; integrated memory circuits; system-on-chip; BIST design; March algorithm; SoC; area overhead; built-in self-test; disturb faults; embedded memory; embedded processor; fault detection; flash memory; memory wrapper cell design; nonvolatile memory; system-on-chip; Algorithm design and analysis; Built-in self-test; Circuit faults; Fault detection; Flash memory; Hardware; Nonvolatile memory; Process design; Random access memory; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Design, Test and Applications, 2006. DELTA 2006. Third IEEE International Workshop on
Conference_Location :
Kuala Lumpur
Print_ISBN :
0-7695-2500-8
Type :
conf
DOI :
10.1109/DELTA.2006.19
Filename :
1581243
Link To Document :
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